Charge pumps are multi-stage analog circuits for generating special-purpose voltages from relatively low voltage supplies in integrated circuits (ICs) and other devices. For example, EEPROM devices (electrically erasible, programmable read-only-memory) such as flash EEPROM and other non-volatile memories typically require voltages for program, read and erase operations that are higher than the device supply voltage (Vcc).
Charge pumps operate by pumping the input voltage at each stage to an incrementally higher voltage and clamping the higher voltage to prevent discharge back to the previous stage. The total number of stages in a charge pump is determined by the initial supply voltage, the voltage increment ("the step") in each stage and the desired output voltage. The output current that can be delivered by the charge pump is a function of the charge transferred from each pumping stage to the next, which in turn is a function of the size of a pumping capacitor in each stage. The voltage and current output from the charge pump for a given purpose define a load point for the charge pump.
Some devices include a charge pump that can be dynamically reconfigured for different operating modes to satisfy multiple load points. For example, in a flash EEPROM device, a charge pump is typically reconfigured into two different modes in order to program a flash cell: a slew mode in which the charge pump supplies a relatively high voltage at relatively low current, and a program mode in which the charge pump supplies a lower voltage and a higher current. Circuits for implementing reconfigurable charge pumps are disclosed in U.S. Pat. No. 5,430,402 of Tedrow et al. and U.S. Pat. No. 5,483,486 of Javanifard et al., both assigned to Intel Corporation.
FIG. 1 is a diagram of a prior art charge pump that can be reconfigured into slew and program modes. When a mode control signal 17 is deasserted, the charge pump is placed in a program mode. In program mode, Vcc is coupled to respective input stages of two five-stage charge pumps, pump A and pump B. The five stages in pump A (12A-12E) are clocked by clocks CLK1, CLK2, CLK3 and CLK4 to develop an output voltage of approximately six times Vcc which is transferred to the pump output 20 via a transistor 15 connected to form a diode. The result is a pump output voltage from pump A approximately equal to 6 Vcc-V.sub.t, V.sub.t being a threshold voltage drop across the diode required to place the diode 15 in a conducting state.
The five stages of pump B (12F-12J) are also clocked by clocks CLK1, CLK2, CLK3 and CLK4 to develop an output voltage of 6 Vcc, but in pump B, the output of the final stage 12J is coupled to the pump output 20 via a pumped output diode 14. A pumped output diode is a circuit for transferring an input voltage to an output terminal in response to a clock signal. The pumped output diode 14 is placed in a transparent state (i.e., no voltage drop across the pumped output diode from input to output) by a capacitively coupled pulse from clock CLK1 and therefore avoids the V.sub.t drop caused by the diode 15 at the output of pump A. Consequently, even though the total circuit area occupied by pump B (i.e., the footprint of pump B) is approximately the same as that of pump A, pump B develops a higher output voltage and therefore delivers a higher current to the load (Z) than pump A. A circuit for implementing a pumped output diode that can be coupled to the final stage of a charge pump is disclosed in U.S. Pat. No. 5,841,703 to Wojciechowski, assigned to Intel Corporation.
When the mode control signal 17 is asserted, the charge pump is placed in slew mode. In slew mode, the pump B input is decoupled from Vcc (i.e., by operation of inverter 18 and transistor 19) and coupled instead to the output of the final stage 12E of pump A, forming a combined 10-stage charge pump. The voltage developed at the final stage 12J of the combined charge pump is approximately 11 Vcc and is coupled transparently to the pump output 20 through the pumped output diode 14.
The purpose of the diode 15 at the output of pump A is to prevent back conduction from the charge pump output into the final stage 12E of pump A. Without the diode 15, the voltage differential between the charge pump output 20 and the final stage 12E of pump A would cause current to flow back into the final stage 12E, substantially reducing the amount of current that can be delivered to the load 21 in slew mode.
Thus, it can be seen that in the prior art reconfigurable charge pump of FIG. 1, inequality between the pump A and pump B output voltages (and currents) is tolerated in order to support concatenation of the pumps into a single, combined charge pump. Pump B delivers more power to the load than pump A, even though the two pumps occupy approximately the same circuit area.